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Browsing by Subject "Extreme value theory"

Now showing items 1-3 of 3

    • EVT-based worst case delay estimation under process variation 

      Antoniadis C., Garyfallou D., Evmorfopoulos N., Stamoulis G. (2018)
      Manufacturing process variation in sub-20nm processes has introduced ever increasing overhead in Static Timing Analysis (STA) in order to guarantee the reliable operation of the circuit. Chip designers apply corner-based ...

    • Fast and accurate BER estimation methodology for I/O links based on extreme value theory 

      Cevrero, A.; Evmorfopoulos, N.; Antoniadis, C.; Ienne, P.; Leblebici, Y.; Burg, A.; Stamoulis, G. (2013)
      This paper introduces a novel approach towards the statistical analysis of modern high-speed 110 and similar communication links; which is capable of reliably to determine extremely low (-10-2 or lower) bit error rates ...

    • Statistical Estimation of Leakage Power Bounds in CMOS VLSI Circuits 

      Bountas D., Evmorfopoulos N., Dimitriou G., Dadaliaris A., Floros G., Stamoulis G. (2021)
      A statistical approach for the estimation of maximum and minimum leakage power in CMOS Very Large Scale Integration (VLSI) circuits is proposed in this paper. The approach is based on the discipline of statistics known as ...